Direct media interface

The Direct Media Interface (DMI) is the link between an Intel Northbridge and an Intel Southbridge on a computer motherboard.DMI shares many characteristics with PCI-E, using multiple lanes and differential signalling to form a point-to-point link.

      Intel Atom n2800 DMI      - 2.5 GT/s
      AMD E-350 DMI              - 2.5 GT/s
      Core i5 (2nd gen) DMI      - 5 GT/s

DMI provides 10Gb/s each direction using a x4 link. First generation Core i3/i5/i7 and Atom series supported DMI. DMI 2.0 (introduced in 2011) doubles the transfer rate to 20Gb/s with a x4 link. Second generation Core i3/i5/i7  series supports DMI 2.0. For more details of DMI for specific chipset visit DMI in Wikipedia or click through to find the required details on Ark Intel website.

System design of Integrated Processors

New Processor designs have integrated Northbridge, Memory controller and Graphics processor into the CPU chip to reduce manufacturing costs and increase performance.

Intel QuickPath Interconnect

The Intel QuickPath Interconnect (QPI) is a point-to-point processor interconnect developed by Intel which replaces the Front Side Bus (FSB) in some Intel Core i7,Xeon processor families. As with HyperTransport, the QuickPath Architecture assumes that the processors will have integrated memory controllers, and enables a non-uniform memory access (NUMA) architecture.

The initial implementation uses a Quad data rate interface to achieve 25.6 GB/s, which is exactly double the theoretical bandwidth of Intel's 1600 MHz FSB used in earlier chipsets.

Quad data rate (or quad pumping) is a communication signaling technique where data(bit) is transmitted at four points in the clock cycle - on the rising edge, falling edge, and at two intermediate points between them. This delivers four bits of data per signal line per clock cycle.

HyperTransport

HyperTransport (HT) is a technology for interconnection of computer processors. It is a bidirectional serial or parallel low-latency, high-bandwidth point-to-point link.

HyperTransport version	year	max. frequency	max. bandwidth bi-directional (32-bit)	max. bandwidth uni-directional (16-bit)	max. bandwidth uni-directional (32-bit)
1.0	2001	800 MHz	12.8 GB/s	3.2 GB/s	6.4 GB/s
2.0	2004	1.4 GHz	22.4 GB/s	5.6 GB/s	11.2 GB/s
3.1	2008	3.2 GHz	51.2 GB/s	12.8 GB/s	25.6 GB/s

HyperTransport comes in four versions 1.x, 2.0, 3.0, and 3.1 , which run from 200 MHz to 3.2 GHz. It has maximum data rate of 6400 MT/s when running at 3.2 GHz. Theoretical transfer rate is (3.2 GHz × 2 bits/Hz × 32 bits/link ÷ 8 (bits per Byte)) in one direction - 51.2 GB/s total throughput. HyperTransport is packet-based, each packet consists of a set of 32-bit words, regardless of the physical width of the link.

AMD uses HyperTransport to replace the Front-Side Bus in many of their processor families. HyperTransport is capable of 32-bit width links, but currently 16 bits links are used by AMD processors. Some chipsets do not even utilize the 16-bit width completely.

Front Side Bus (FSB)

A front-side bus (FSB) is a communication interface (bus) often used in computers manufactured in the 1990s and 2000s. It carries data between the central processing unit (CPU) and the Northbridge.

The frequency at which a processor (CPU) operates is determined by applying a clock multiplier to the front-side bus (FSB) speed. For example CPU which is set to run at 8 times(multiplier) the frequency of the front-side bus has a clock speed of : 400 MHz × 8 = 3200 MHz. Often system performance depends on the FSB clock speed. A slow FSB can cause the CPU to spend more amount of time waiting for data to be fetched from system memory.

Advantages of front-side bus are high flexibility and low cost. The front-side bus was criticized by AMD as an old and slow technology which limits system performance.

Most modern processors use point-to-point connections like AMD's HyperTransport and Intel's QuickPath Interconnect (QPI). In HT- and QPI-based processors, the memory is accessed independently by using a memory controller integrated into the CPU chip itself, freeing bandwidth on the HyperTransport or QPI link for other purposes.